Invention Grant
- Patent Title: Equalizer and method for performing equalization
- Patent Title (中): 均衡器和均衡方法
-
Application No.: US12254661Application Date: 2008-10-20
-
Publication No.: US08385401B2Publication Date: 2013-02-26
- Inventor: Frederick W. Miller
- Applicant: Frederick W. Miller
- Applicant Address: SG Singapore
- Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd
- Current Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd
- Current Assignee Address: SG Singapore
- Main IPC: H03H7/30
- IPC: H03H7/30 ; H04Q1/20 ; H03K5/159

Abstract:
An FFE/DFE equalizer is provided that uses unclocked FIR filters. At least one of the unclocked FIR filters has tunable delay cells that can be tuned to adjust their respective time delay time periods. Because the FIR filters of the FFE/DFE equalizer are unclocked, the complexity and die area associated with clocking circuits are avoided, thereby enabling costs to be reduced. Because the delay cells of at least one of the FIR filters are tunable to enable their respective time delay periods to be adjusted, very good equalizer performance is achieved without having to use clocked circuits. In addition, because clocked circuits are not used in the FIR filters, the need for clocking circuits to control the timing of clocked circuits is obviated, which leads to a reduction in the amount of power consumed by the FFE/DFE equalizer.
Public/Granted literature
- US20100098147A1 EQUALIZER AND METHOD FOR PERFORMING EQUALIZATION Public/Granted day:2010-04-22
Information query