Invention Grant
- Patent Title: Apparatus and method for multi-level cache utilization
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Application No.: US13450882Application Date: 2012-04-19
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Publication No.: US08386701B2Publication Date: 2013-02-26
- Inventor: Raymond Scott Tetrick , Dale Juenemann , Robert Brennan
- Applicant: Raymond Scott Tetrick , Dale Juenemann , Robert Brennan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Jordan IP Law, LLC
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
In some embodiments, a non-volatile cache memory may include a multi-level non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory. Other embodiments are disclosed and claimed.
Public/Granted literature
- US20120203960A1 APPARATUS AND METHOD FOR MULTI-LEVEL CACHE UTILIZATION Public/Granted day:2012-08-09
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