Invention Grant
- Patent Title: Semiconductor integrated circuit and operating voltage control method
- Patent Title (中): 半导体集成电路及工作电压控制方法
-
Application No.: US13005289Application Date: 2011-01-12
-
Publication No.: US08386988B2Publication Date: 2013-02-26
- Inventor: Masahiro Nomura
- Applicant: Masahiro Nomura
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2010-010372 20100120
- Main IPC: H03H11/26
- IPC: H03H11/26 ; G06F17/50

Abstract:
A semiconductor integrated circuit includes a first circuit part that is designed under a first corner condition with respect to a process variation, a second circuit part that is designed under a second corner condition narrower than the first condition, and a control part that changes an operating voltage supplied to the first circuit part and the second circuit part according to a delay amount of the first circuit part, and starts the second circuit part when a delay characteristic caused by a change in the operating voltage conforms to a delay characteristic under the second corner condition.
Public/Granted literature
- US20110175658A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND OPERATING VOLTAGE CONTROL METHOD Public/Granted day:2011-07-21
Information query