Invention Grant
- Patent Title: Semiconductor circuit design support technique
- Patent Title (中): 半导体电路设计支持技术
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Application No.: US12358888Application Date: 2009-01-23
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Publication No.: US08386989B2Publication Date: 2013-02-26
- Inventor: Takahide Yoshikawa
- Applicant: Takahide Yoshikawa
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Greer, Burns & Crain, Ltd.
- Priority: JP2008-135003 20080523
- Main IPC: G06F11/22
- IPC: G06F11/22 ; G06F17/50

Abstract:
Designation of observation points in an observation target circuit for which operations are observed in simulation is accepted, and circuit data of an observation circuit is attached to circuit data of the observation target circuit so that the observation circuit is connected to the observation target circuit according to designation data of the observation points. At this time, a double-buffer configuration is adopted for the observation circuit, and the number of occurrence times of a specific state at a specific observation point during a first period and the number of occurrence times of the specific state at the specific observation point during a second period are alternately outputted and stored into RAM.
Public/Granted literature
- US20090293025A1 SEMICONDUCTOR CIRCUIT DESIGN SUPPORT TECHNIQUE Public/Granted day:2009-11-26
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