Invention Grant
US08389396B2 Method for manufacture of integrated circuit package system with protected conductive layers for pads
有权
用于制造具有用于焊盘的保护导电层的集成电路封装系统的方法
- Patent Title: Method for manufacture of integrated circuit package system with protected conductive layers for pads
- Patent Title (中): 用于制造具有用于焊盘的保护导电层的集成电路封装系统的方法
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Application No.: US13233402Application Date: 2011-09-15
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Publication No.: US08389396B2Publication Date: 2013-03-05
- Inventor: Yaojian Lin , Haijing Cao , Qing Zhang
- Applicant: Yaojian Lin , Haijing Cao , Qing Zhang
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Agent Mikio Ishimaru
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method for manufacture of an integrated circuit package system includes: providing an integrated circuit die having a contact pad; forming a protection cover over the contact pad; forming a passivation layer having a first opening over the protection cover with the first opening exposing the protection cover; developing a conductive layer over the passivation layer; forming a pad opening in the protection cover for exposing the contact pad having the conductive layer partially removed; and an interconnect directly on the contact pad and only adjacent to the protection cover and the passivation layer.
Public/Granted literature
- US20120003830A1 METHOD FOR MANUFACTURE OF INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PROTECTED CONDUCTIVE LAYERS FOR PADS Public/Granted day:2012-01-05
Information query
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