Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US13052400Application Date: 2011-03-21
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Publication No.: US08390313B2Publication Date: 2013-03-05
- Inventor: Yoshifumi Ikenaga , Masahiro Nomura
- Applicant: Yoshifumi Ikenaga , Masahiro Nomura
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2010-082458 20100331
- Main IPC: H03K19/00
- IPC: H03K19/00 ; G01R25/00

Abstract:
When an operation of a specified one of monitor circuits is defective or any of elements forming a ring oscillator in each of the monitor circuits has characteristic abnormality, if voltage control is performed based on a result from the monitor operating at a lowest speed, a required voltage may be overestimated. This results in an increase in power consumption, and also causes an accuracy reduction when the average value of detection results from the multiple monitors is calculated. The multiple monitor circuits are provided. Of the detection results therefrom, any detection result falling outside a predetermined range is ignored, and the average value of the remaining monitor results is used as a final monitor detection value.
Public/Granted literature
- US20110241725A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2011-10-06
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