Invention Grant
- Patent Title: Non-volatile logic circuit and a method for operating the same
- Patent Title (中): 非易失性逻辑电路及其操作方法
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Application No.: US13221029Application Date: 2011-08-30
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Publication No.: US08390322B2Publication Date: 2013-03-05
- Inventor: Yukihiro Kaneko
- Applicant: Yukihiro Kaneko
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-108888 20100511
- Main IPC: H03K19/173
- IPC: H03K19/173 ; G11C11/22

Abstract:
In a non-volatile logic circuit, a first input electrode and a second input electrode are formed on a semiconductor layer and interposed between an electric current source electrode and an output electrode in a plan view. The semiconductor layer is disposed on a ferroelectric layer. A method of operating the non-volatile logic circuit includes a step of writing one state selected from four states by applying voltages to the first and second input electrode, respectively, a step of measuring current generated by applying the voltage between the electric current source electrode and the output electrode to determine, on the basis of the measured current, which of the high or low resistant state the non-volatile logic circuit has.
Public/Granted literature
- US20110309859A1 METHOD FOR OPERATING A NON-VOLATILE LOGIC CIRCUIT Public/Granted day:2011-12-22
Information query
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