Invention Grant
- Patent Title: Coherent instruction cache utilizing cache-op execution resources
- Patent Title (中): 使用缓存操作执行资源的相干指令缓存
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Application No.: US12332291Application Date: 2008-12-10
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Publication No.: US08392663B2Publication Date: 2013-03-05
- Inventor: Ryan C. Kinter , Darren M. Jones , Matthias Knoth
- Applicant: Ryan C. Kinter , Darren M. Jones , Matthias Knoth
- Applicant Address: US CA Sunnyvale
- Assignee: MIPS Technologies, Inc.
- Current Assignee: MIPS Technologies, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Kilpatrick Townsend & Stockton LLP
- Agent Ardeshir Tabibi
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F12/10 ; G06F13/00 ; G06F15/16

Abstract:
A multiprocessor system maintains cache coherence among processors in a coherent domain. Within the coherent domain, a first processor can receive a command to perform a cache maintenance operation. The first processor can determine whether the cache maintenance operation is a coherent operation. For coherent operations, the first processor sends a coherent request message for distribution to other processors in the coherent domain and can cancel execution of the cache maintenance operation pending receipt of intervention messages corresponding to the coherent request. The intervention messages can reflect a global ordering of coherence traffic in the multiprocessor system and can include instructions for maintaining a data cache and an instruction cache of the first processor. Cache maintenance operations that are determined to be non-coherent can be executed at the first processor without sending the coherent request.
Public/Granted literature
- US20090157981A1 COHERENT INSTRUCTION CACHE UTILIZING CACHE-OP EXECUTION RESOURCES Public/Granted day:2009-06-18
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