Invention Grant
- Patent Title: Method of translating n to n instructions employing an enhanced extended translation facility
- Patent Title (中): 使用增强的扩展翻译设施翻译n到n个指令的方法
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Application No.: US12872275Application Date: 2010-08-31
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Publication No.: US08392888B2Publication Date: 2013-03-05
- Inventor: John R. Ehrman , Mike S. Fulton , Dan F. Greiner
- Applicant: John R. Ehrman , Mike S. Fulton , Dan F. Greiner
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent John Campbell
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F9/45

Abstract:
A method, article, and system for providing an effective implementation of assembler language translate-n-to-n instructions implemented on 21, 31, and 64-bit architectures, while maintaining backward compatibility with existing systems. The enhanced Extended-Translation Facility 2 (ETF2) instruction set introduces a new operand in an unused field (M3) that facilitates a change in the original instruction format and its intended function. With the ETF2-Enhancement Facility installed, a value of zeros in the M3 field indicates that instruction operation is to continue as originally defined. When a nonzero value is coded in the M3 field a new function is carried out. The assembler accommodates the changes by making the new M3 field optional when coding the instructions. If the M3 field is not coded, the assembler defaults to providing zeros in the M3 field (as found in the original instruction format), and backward compatible operation is provided.
Public/Granted literature
- US20100325401A1 Method of Translating N to N Instructions Employing an Enhanced Extended Translation Facility Public/Granted day:2010-12-23
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