Invention Grant
US08394244B1 System and method for laser patterning an integrated circuit etching mask
有权
用于激光图案化集成电路蚀刻掩模的系统和方法
- Patent Title: System and method for laser patterning an integrated circuit etching mask
- Patent Title (中): 用于激光图案化集成电路蚀刻掩模的系统和方法
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Application No.: US12566600Application Date: 2009-09-24
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Publication No.: US08394244B1Publication Date: 2013-03-12
- Inventor: Joseph Martin Patterson
- Applicant: Joseph Martin Patterson
- Applicant Address: US CA Sunnyvale
- Assignee: Applied Micro Circuits Corporation
- Current Assignee: Applied Micro Circuits Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Turocy & Watson, LLP
- Main IPC: C23C14/00
- IPC: C23C14/00 ; C23C14/32 ; G01R31/26 ; H01L21/66 ; H01L21/00

Abstract:
A method is provided for laser patterning an integrated circuit (IC) etching mask. The method provides an IC packaged die with a first region underlying a backside surface of a bulk silicon (Si) layer. An etch-resistant film is formed overlying the backside surface. Alternately, the entire IC die package is conformally coated. A semi-transparent film is formed overlying the etch-resistant film, semi-transparent to light having a first wavelength. In response to irradiating the semi-transparent film with light having a first power density, an IC die first region is located. In response to irradiating the semi-transparent film with a laser light having a second power density, greater than the first power density, an area of etch-resistant film overlying the first region is decomposed. More explicitly, an area of semi-transparent film overlying the first region is ablated, and the etch-resistant film underlying the ablated semi-transparent film is heated.
Information query
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