Invention Grant
US08394702B2 Method for making dual gate oxide trench MOSFET with channel stop using three or four masks process
有权
使用三个或四个掩模工艺制造具有通道停止的双栅氧化物沟槽MOSFET的方法
- Patent Title: Method for making dual gate oxide trench MOSFET with channel stop using three or four masks process
- Patent Title (中): 使用三个或四个掩模工艺制造具有通道停止的双栅氧化物沟槽MOSFET的方法
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Application No.: US12782573Application Date: 2010-05-18
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Publication No.: US08394702B2Publication Date: 2013-03-12
- Inventor: Sung-Shan Tai , Sik Lui , Xiaobin Wang
- Applicant: Sung-Shan Tai , Sik Lui , Xiaobin Wang
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8249 ; H01L21/425 ; H01L21/20 ; H01L29/66
Abstract:
A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.
Public/Granted literature
- US20110233667A1 DUAL GATE OXIDE TRENCH MOSFET WITH CHANNEL STOP TRENCH AND THREE OR FOUR MASKS PROCESS Public/Granted day:2011-09-29
Information query
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