Invention Grant
- Patent Title: Bottom-notched SiGe FinFET formation using condensation
- Patent Title (中): 底部缺口SiGe使用冷凝的FinFET形成
-
Application No.: US12702862Application Date: 2010-02-09
-
Publication No.: US08395195B2Publication Date: 2013-03-12
- Inventor: Chih-Hao Chang , Jeffrey Junhao Xu , Chien-Hsun Wang , Chih-Hsiang Chang
- Applicant: Chih-Hao Chang , Jeffrey Junhao Xu , Chien-Hsun Wang , Chih-Hsiang Chang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L27/085
- IPC: H01L27/085

Abstract:
An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.
Public/Granted literature
- US20110193178A1 Bottom-Notched SiGe FinFET Formation Using Condensation Public/Granted day:2011-08-11
Information query
IPC分类: