Invention Grant
- Patent Title: Digital noise filter
- Patent Title (中): 数字噪声滤波器
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Application No.: US13106043Application Date: 2011-05-12
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Publication No.: US08395417B2Publication Date: 2013-03-12
- Inventor: Ryoichi Yamaguchi
- Applicant: Ryoichi Yamaguchi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2009-144486 20090617
- Main IPC: H03K19/00
- IPC: H03K19/00

Abstract:
A digital noise filter circuit includes a gating clock generating circuit and a noise filter circuit. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The gating clock generating circuit supplies a gating clock as an operating clock to the noise filter circuit when the logic levels of both signals do not coincide, and halts supply of the gating clock when the logic levels of both signals do coincide. The noise filter circuit removes noise from the input signal and outputting the resultant signal as the output signal.
Public/Granted literature
- US20110215838A1 DIGITAL NOISE FILTER Public/Granted day:2011-09-08
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