There are provided a differential input circuit, a PMOS transistor 20 that connects between a power supply VDD and one of power supplies of the differential input circuit and that enables switching between an operation state and a non-operating state of the differential input circuit, and a PMOS transistor 14 that is connected in parallel with the PMOS transistor 20 and that receives an output signal of the differential input circuit at its gate. The size of the PMOS transistor 20 is smaller than the size of the PMOS transistor 14. There are further provided an NMOS transistor 19 that connects between a ground and the other power supply of the differential input circuit and that enables switching between an operation state and a non-operating state of the differential input circuit, and an NMOS transistor 13 that is connected in parallel with the NMOS transistor 19 and that receives the output signal of the differential input circuit at its gate. The size of the NMOS transistor 19 is smaller than the size of the NMOS transistor 13.