Invention Grant
- Patent Title: Cross-point self-aligned reduced cell size phase change memory
- Patent Title (中): 交叉点自对准减小单元尺寸相变存储器
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Application No.: US12899232Application Date: 2010-10-06
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Publication No.: US08395935B2Publication Date: 2013-03-12
- Inventor: Hsiang-Lan Lung , Erh-Kun Lai
- Applicant: Hsiang-Lan Lung , Erh-Kun Lai
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes Beffel & Wolfeld LLP
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A programmable memory array is disclosed in which the phase change memory cells are self-aligned at the access devices and at the cross-points of the bit lines and the word lines. A method for making the array employs one line mask to define the bit lines and another line mask to define the word lines. The front end of line (FEOL) memory cell elements are in the same layer as the polysilicon gates. The bit lines and the word lines intersect over the devices, and the memory cell elements are formed at the intersections of the bit lines and the word line.
Public/Granted literature
- US20120087181A1 Cross-Point Self-Aligned Reduced Cell Size Phase Change Memory Public/Granted day:2012-04-12
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