Invention Grant
US08395935B2 Cross-point self-aligned reduced cell size phase change memory 有权
交叉点自对准减小单元尺寸相变存储器

Cross-point self-aligned reduced cell size phase change memory
Abstract:
A programmable memory array is disclosed in which the phase change memory cells are self-aligned at the access devices and at the cross-points of the bit lines and the word lines. A method for making the array employs one line mask to define the bit lines and another line mask to define the word lines. The front end of line (FEOL) memory cell elements are in the same layer as the polysilicon gates. The bit lines and the word lines intersect over the devices, and the memory cell elements are formed at the intersections of the bit lines and the word line.
Public/Granted literature
Information query
Patent Agency Ranking
0/0