Invention Grant
US08395947B2 Increased DRAM-array throughput using inactive bitlines 有权
使用不稳定位线增加DRAM阵列吞吐量

Increased DRAM-array throughput using inactive bitlines
Abstract:
A memory device with increased communication bandwidth is described. In this memory device, control logic routes data signals from a memory array using inactive bitlines in response to a read command. These data signals are then placed on an adjacent unused input/output (I/O) line or routing channel, as opposed to a proximate I/O line that is in use. For example, unused bitlines located on the top and bottom of the memory array may be used to route data signals to adjacent local I/O lines. In particular, the data signals can be placed on unused local I/O lines which are associated with adjacent bitline sense amplifiers. The resulting increased communication bandwidth can overcome the constraints imposed by the limited number of local I/O lines in the memory device without appreciably increasing the chip size, power consumption, or cost.
Public/Granted literature
Information query
Patent Agency Ranking
0/0