Invention Grant
US08397130B2 Circuits and methods for detection of soft errors in cache memories
有权
用于检测高速缓冲存储器中的软错误的电路和方法
- Patent Title: Circuits and methods for detection of soft errors in cache memories
- Patent Title (中): 用于检测高速缓冲存储器中的软错误的电路和方法
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Application No.: US12626479Application Date: 2009-11-25
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Publication No.: US08397130B2Publication Date: 2013-03-12
- Inventor: Lawrence T. Clark , Dan W. Patterson , Xiaoyin Yao
- Applicant: Lawrence T. Clark , Dan W. Patterson , Xiaoyin Yao
- Applicant Address: US AZ Scottsdale
- Assignee: Arizona Board of Regents for and on behalf of Arizona State University
- Current Assignee: Arizona Board of Regents for and on behalf of Arizona State University
- Current Assignee Address: US AZ Scottsdale
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
Embodiments of circuits and methods for circuits for the detection of soft errors in cache memories are described herein. Other embodiments and related methods and examples are also described herein.
Public/Granted literature
- US20100269018A1 Method for preventing IP address cheating in dynamica address allocation Public/Granted day:2010-10-21
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