Invention Grant
- Patent Title: Underfill device and method
- Patent Title (中): 底部填充装置和方法
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Application No.: US11169518Application Date: 2005-06-29
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Publication No.: US08399291B2Publication Date: 2013-03-19
- Inventor: Patricia A Brusso , Mitul B Modi , Carolyn R. McCormick , Ruben Cadena , Sankara J Subramanian , Edward L. Martin
- Applicant: Patricia A Brusso , Mitul B Modi , Carolyn R. McCormick , Ruben Cadena , Sankara J Subramanian , Edward L. Martin
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
An underfill device and method have been are provided. Advantages of devices and methods shown include dissipation of stresses at an interface between components such as a chip package and an adjacent circuit board. Another advantage includes faster manufacturing time and ease of manufacture using underfill devices and methods shown. An underfill assembly can be pre made with conductive structures included within the underfill assembly. Steps such as flowing epoxy and curing can be eliminated or performed concurrently with other manufacturing steps.
Public/Granted literature
- US20070004085A1 Underfill device and method Public/Granted day:2007-01-04
Information query
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