Invention Grant
- Patent Title: Fabricating a semiconductor chip with backside optical vias
- Patent Title (中): 制造具有背面光通孔的半导体芯片
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Application No.: US12827825Application Date: 2010-06-30
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Publication No.: US08399292B2Publication Date: 2013-03-19
- Inventor: Fuad Elias Doany , Christopher Vincent Jahnes , Clint Lee Schow , Mehmet Soyuer , Alexander V. Rylyakov
- Applicant: Fuad Elias Doany , Christopher Vincent Jahnes , Clint Lee Schow , Mehmet Soyuer , Alexander V. Rylyakov
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Anne Dougherty
- Main IPC: H01L21/768
- IPC: H01L21/768

Abstract:
Fabricating a semiconductor chip with backside optical vias is provided. A silicon wafer is received for processing. The silicon wafer includes an optically transparent oxide layer on a frontside of the silicon wafer. A complementary metal-oxide-semiconductor layer is formed on top of the optically transparent oxide layer. A backside of the silicon wafer is etched to form optical vias in a silicon substrate using the optically transparent oxide layer as an etch-stop.
Public/Granted literature
- US20120001166A1 PARELLEL OPTICAL TRANSCEIVER MODULE Public/Granted day:2012-01-05
Information query
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