Invention Grant
- Patent Title: Method for making asymmetric double-gate transistors
- Patent Title (中): 制造非对称双栅晶体管的方法
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Application No.: US12521233Application Date: 2007-12-28
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Publication No.: US08399316B2Publication Date: 2013-03-19
- Inventor: Maud Vinet , Olivier Thomas , Olivier Rozeau , Thierry Poiroux
- Applicant: Maud Vinet , Olivier Thomas , Olivier Rozeau , Thierry Poiroux
- Applicant Address: JP Paris
- Assignee: Commissariat a l'Energie Atomique
- Current Assignee: Commissariat a l'Energie Atomique
- Current Assignee Address: JP Paris
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR0656010 20061228
- International Application: PCT/EP2007/064627 WO 20071228
- International Announcement: WO2008/080977 WO 20080710
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method for making a microelectronic device with one or plural double-gate transistors, including: a) forming one or plural structures on a substrate including at least one first block configured to form a first gate of a double-gate transistor, and at least a second block configured to form the second gate of the double-gate, the first block and the second block being located on opposite sides of at least one semiconducting zone and separated from the semiconducting zone by a first gate dielectric zone and a second gate dielectric zone respectively; and b) doping at least one or plural semiconducting zones in the second block of at least one given structure among the structures, using at least a first implantation selective relative to the first block, the implantation being done on a first side of the given structure, the part of the structure on the other side of the normal to the principal plane of the substrate passing through the semiconducting zone not being implanted.
Public/Granted literature
- US20100178743A1 METHOD FOR MAKING ASYMMETRIC DOUBLE-GATE TRANSISTORS Public/Granted day:2010-07-15
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