Invention Grant
- Patent Title: Through-silicon via with low-K dielectric liner
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Application No.: US12617259Application Date: 2009-11-12
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Publication No.: US08399354B2Publication Date: 2013-03-19
- Inventor: Ming-Fa Chen
- Applicant: Ming-Fa Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A semiconductor substrate having a through-silicon via with an air gap interposed between the through-silicon via and the semiconductor substrate is provided. An opening is formed partially through the semiconductor substrate. The opening is first lined with a first liner and then the opening is filled with a conductive material. A backside of the semiconductor substrate is thinned to expose the first liner, which is subsequently removed and a second liner formed with a low-k or extra low-k dielectric is formed in its place.
Public/Granted literature
- US20100176494A1 Through-Silicon Via With Low-K Dielectric Liner Public/Granted day:2010-07-15
Information query
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