Invention Grant
- Patent Title: Method of forming patterns of semiconductor device
- Patent Title (中): 形成半导体器件图案的方法
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Application No.: US13331882Application Date: 2011-12-20
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Publication No.: US08399955B2Publication Date: 2013-03-19
- Inventor: Tae Kyung Kim
- Applicant: Tae Kyung Kim
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2009-0053837 20090617
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A method of forming patterns of a semiconductor device comprises forming a number of first insulating patterns that define sidewalls by patterning a first insulating layer formed over a semiconductor substrate, forming second insulating patterns, each second insulating pattern comprising a horizontal portion having two ends and being parallel to the semiconductor substrate and spaced protruding portions protruding from both ends of the horizontal portion parallel to the sidewalls of the first insulating patterns, forming third insulating patterns each filling a space between the protruding portions, removing the protruding portions to form trenches, and forming conductive patterns within the respective trenches.
Public/Granted literature
- US20120086134A1 Method of Forming Patterns of Semiconductor Device Public/Granted day:2012-04-12
Information query
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