A fuse part for a semiconductor device includes an insulation layer configured to cover a conductive pattern over a substrate, a dual fuse configured to include a first pattern and a second pattern that are positioned on the same line over the insulation layer and spaced apart from each other by a certain distance, a protective layer configured to cover the dual fuse and include a first fuse box and a second fuse box that partially expose the first pattern and the second pattern, respectively, and a plurality of plugs configured to penetrate the insulation layer and electrically connect the first and second patterns to the conductive pattern. Herein, the plugs are positioned beneath the first and second fuse boxes.