Invention Grant
- Patent Title: Semiconductor device and method of forming through hole vias in die extension region around periphery of die
- Patent Title (中): 半导体器件和在芯片周围的芯延伸区域中形成通孔的方法
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Application No.: US12858602Application Date: 2010-08-18
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Publication No.: US08399991B2Publication Date: 2013-03-19
- Inventor: Henry Descalzo Bathan , Zigmund Ramirez Camacho , Lionel Chien Hui Tay , Arnel Senosa Trasporto
- Applicant: Henry Descalzo Bathan , Zigmund Ramirez Camacho , Lionel Chien Hui Tay , Arnel Senosa Trasporto
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/498
Abstract:
A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.
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