Invention Grant
US08402831B2 Monolithic integrated CMUTs fabricated by low-temperature wafer bonding
有权
通过低温晶片接合制造的单片集成CMUT
- Patent Title: Monolithic integrated CMUTs fabricated by low-temperature wafer bonding
- Patent Title (中): 通过低温晶片接合制造的单片集成CMUT
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Application No.: US12660807Application Date: 2010-03-03
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Publication No.: US08402831B2Publication Date: 2013-03-26
- Inventor: Mario Kupnik , Butrus T. Khuri-Yakub
- Applicant: Mario Kupnik , Butrus T. Khuri-Yakub
- Applicant Address: US CA Palo Alto
- Assignee: The Board of Trustees of the Leland Standford Junior University
- Current Assignee: The Board of Trustees of the Leland Standford Junior University
- Current Assignee Address: US CA Palo Alto
- Agency: Lumen Patent Firm
- Main IPC: G01H11/00
- IPC: G01H11/00 ; H02N11/00 ; H04R31/00

Abstract:
Low temperature wafer bonding (temperature of 450° C. or less) is employed to fabricate CMUTs on a wafer that already includes active electrical devices. The resulting structures are CMUT arrays integrated with active electronics by a low-temperature wafer bonding process. The use of a low-temperature process preserves the electronics during CMUT fabrication. With this approach, it is not necessary to make compromises in the CMUT or electronics designs, as is typical of the sacrificial release fabrication approach. Various disadvantages of sacrificial release, such as low process control, poor design flexibility, low reproducibility, and reduced performance are avoided with the present approach. With this approach, a CMUT array can be provided with per-cell electrodes connected to the substrate integrated circuitry. This enables complete flexibility in electronically assigning the CMUT cells to CMUT array elements.
Public/Granted literature
- US20100225200A1 Monolithic integrated CMUTs fabricated by low-temperature wafer bonding Public/Granted day:2010-09-09
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