Invention Grant
US08404433B2 Method for forming resist pattern and method for manufacturing semiconductor device
失效
用于形成抗蚀剂图案的方法和用于制造半导体器件的方法
- Patent Title: Method for forming resist pattern and method for manufacturing semiconductor device
- Patent Title (中): 用于形成抗蚀剂图案的方法和用于制造半导体器件的方法
-
Application No.: US12662199Application Date: 2010-04-05
-
Publication No.: US08404433B2Publication Date: 2013-03-26
- Inventor: Shigeharu Okaji
- Applicant: Shigeharu Okaji
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2009-092940 20090407
- Main IPC: G03F7/26
- IPC: G03F7/26

Abstract:
In order to suppress variation of a resist pattern size caused by a temperature unevenness at a prebaking process, applying a resist of a positive type or a negative type on a base substrate, prebaking, exposing, post-exposure baking, and forming the resist to be a predetermined shape by developing the resist are carried out. The prebaking is carried out at a temperature equal to or more than a detachment starting temperature of a protective group of a base resin included in the resist in a case where the resist is the positive type. In a case where the resist is the negative type, the prebaking is carried out at a temperature equal to or more than a cross-linking starting temperature of a cross-linker in a base resin included in the resist.
Public/Granted literature
- US20100255421A1 Method for forming resist pattern and method for manufacturing semiconductor device Public/Granted day:2010-10-07
Information query
IPC分类: