Invention Grant
- Patent Title: Method for fabricating semiconductor device with buried gate
- Patent Title (中): 具有埋栅的半导体器件的制造方法
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Application No.: US12623719Application Date: 2009-11-23
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Publication No.: US08404543B2Publication Date: 2013-03-26
- Inventor: Jong-Han Shin , Cheol-Hwi Ryu , Sung-Jun Kim
- Applicant: Jong-Han Shin , Cheol-Hwi Ryu , Sung-Jun Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2009-0059382 20090630
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for fabricating a semiconductor device with a buried gate includes: etching a substrate to form a plurality of trenches; forming a plurality of buried gates that fill lower portions of the trenches; forming a plurality of sealing layers that gap-fill upper portions of the trenches and have protrusions higher than a top surface of the substrate; forming an inter-layer insulation layer over the whole surface of the substrate including the sealing layers; and etching the inter-layer insulation layer to form a contact hole that is aligned with a space between the protrusions of the sealing layers.
Public/Granted literature
- US20100330775A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATE Public/Granted day:2010-12-30
Information query
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