Invention Grant
- Patent Title: Source/drain extension control for advanced transistors
-
Application No.: US12960289Application Date: 2010-12-03
-
Publication No.: US08404551B2Publication Date: 2013-03-26
- Inventor: Pushkar Ranade , Lucian Shifren , Sachin R. Sonkusale
- Applicant: Pushkar Ranade , Lucian Shifren , Sachin R. Sonkusale
- Applicant Address: US CA Los Gatos
- Assignee: Suvolta, Inc.
- Current Assignee: Suvolta, Inc.
- Current Assignee Address: US CA Los Gatos
- Agency: Baker Botts L.L.P.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/70 ; H01L29/02

Abstract:
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1×1019 atoms/cm3, or alternatively, less than one-quarter the dopant concentration of the source and the drain.
Public/Granted literature
- US20120139051A1 SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS Public/Granted day:2012-06-07
Information query
IPC分类: