Invention Grant
US08404579B2 Methods of forming integrated circuit devices with crack-resistant fuse structures
有权
形成具有抗裂熔断结构的集成电路器件的方法
- Patent Title: Methods of forming integrated circuit devices with crack-resistant fuse structures
- Patent Title (中): 形成具有抗裂熔断结构的集成电路器件的方法
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Application No.: US12960150Application Date: 2010-12-03
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Publication No.: US08404579B2Publication Date: 2013-03-26
- Inventor: Sang-Hoon Ahn , Gil-Heyun Choi , Jong-Myeong Lee , Sang-Don Nam , Kyu-Hee Han
- Applicant: Sang-Hoon Ahn , Gil-Heyun Choi , Jong-Myeong Lee , Sang-Don Nam , Kyu-Hee Han
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2009-0119506 20091204
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A fuse base insulating region, for example, an insulating interlayer or a compensation region disposed in an insulating interlayer, is formed on a substrate. An etch stop layer is formed on the fuse base insulating region and forming an insulating interlayer having a lower dielectric constant than the first fuse base insulating region on the etch stop layer. A trench extending through the insulating interlayer and the etch stop layer and at least partially into the fuse base insulating region is formed. A fuse is formed in the trench. The fuse base insulating region may have a greater mechanical strength and/or density than the second insulating interlayer.
Public/Granted literature
- US20110136332A1 METHODS OF FORMING INTEGRATED CIRCUIT DEVICES WITH CRACK-RESISTANT FUSE STRUCTURES Public/Granted day:2011-06-09
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