A semiconductor device includes a substrate (e.g., a P-type semiconductor substrate), and an isolation region formed in the substrate to isolate an element formation region from the other region. The semiconductor device also includes a gate electrode formed over the element formation region. The gate electrode extends over each of first and second regions of the isolation region opposing each other with the element formation region interposed therebetween. The semiconductor device further includes a pair of diffusion regions (e.g., N-type diffusion regions) formed in the element formation region so as to be spaced apart from each other in a channel length direction with reference to the gate electrode. At least a portion of each of upper surfaces of the first and second regions is depressed to a depth of not less than 5% of a channel width to be located under an upper surface of the element formation region. In each of resultant depressions also, a portion of the gate electrode is present.