Invention Grant
- Patent Title: Semiconductor device and method of patterning resin insulation layer on substrate of the same
- Patent Title (中): 树脂绝缘层的图案化半导体装置及方法
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Application No.: US12887874Application Date: 2010-09-22
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Publication No.: US08405218B2Publication Date: 2013-03-26
- Inventor: Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu
- Applicant: Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2009-237509 20091014
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40
Abstract:
In a method of manufacturing a semiconductor device, an electrode layer is formed on a surface of a semiconductor substrate, and a resin insulation layer is formed on the surface of the semiconductor substrate so that the electrode layer can be covered with the resin insulation layer. A tapered hole is formed in the insulation layer by using a tool bit having a rake angle of zero or a negative value. The tapered hole has an opening defined by the insulation layer, a bottom defined by the electrode layer, and a side wall connecting the opening to the bottom.
Public/Granted literature
- US20110198733A1 SEMICONDUCTOR DEVICE AND METHOD OF PATTERNNING RESIN INSULATION LAYER ON SUBSTRATE OF THE SAME Public/Granted day:2011-08-18
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