Invention Grant
- Patent Title: Multilevel slicer
- Patent Title (中): 多层切片机
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Application No.: US13192024Application Date: 2011-07-27
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Publication No.: US08405427B2Publication Date: 2013-03-26
- Inventor: Pier Andrea Francese
- Applicant: Pier Andrea Francese
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Daniel Morris
- Main IPC: H03K5/153
- IPC: H03K5/153

Abstract:
A circuit design configured to process a differential input signal is provided. A first floating capacitor ladder is configured to receive the positive of the differential input signal and is connected to a first switched capacitor network through phase one controlled switches. A second floating capacitor ladder configured to receive the negative of the differential input signal and is connected to a second switched capacitor network through other phase one controlled switches. A reference resistor ladder is connected to the first switched capacitor network through phase two controlled switches to provide voltage references and connected to the second switched capacitor network through other phase two controlled switches to provide the voltage references. Response to controlling the switches, the first floating capacitor ladder is configured to output first voltage thresholds to a comparator array and the second floating capacitor ladder is configured to output second voltage thresholds to the comparator array.
Public/Granted literature
- US20130027088A1 MULTILEVEL SLICER Public/Granted day:2013-01-31
Information query
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