Invention Grant
- Patent Title: Low-leakage power supply architecture for an SRAM array
- Patent Title (中): SRAM阵列的低漏电电源架构
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Application No.: US12775220Application Date: 2010-05-06
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Publication No.: US08406039B2Publication Date: 2013-03-26
- Inventor: Cheng Hung Lee , Hsu-Shun Chen , Wei Min Chan , Shao-Yu Chou
- Applicant: Cheng Hung Lee , Hsu-Shun Chen , Wei Min Chan , Shao-Yu Chou
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A method of forming an integrated circuit structure includes providing a chip; forming a static random access memory (SRAM) cell including a transistor on the chip; and forming a bias transistor configured to gate a power supply voltage provided to the SRAM cell on the chip. The bias transistor and the transistor of the SRAM cell are formed simultaneously.
Public/Granted literature
- US20110007596A1 Low-Leakage Power Supply Architecture for an SRAM Array Public/Granted day:2011-01-13
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