Invention Grant
US08406334B1 Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding
有权
用于QR分解和MIMO解码的溢流阻抗,固定精度,位优化收缩阵列
- Patent Title: Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding
- Patent Title (中): 用于QR分解和MIMO解码的溢流阻抗,固定精度,位优化收缩阵列
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Application No.: US12814319Application Date: 2010-06-11
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Publication No.: US08406334B1Publication Date: 2013-03-26
- Inventor: Raghavendar M. Rao , Raied N. Mazahreh , Hai-Jo Tarn
- Applicant: Raghavendar M. Rao , Raied N. Mazahreh , Hai-Jo Tarn
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent LeRoy D. Maunu; Lois D. Cartier
- Main IPC: H04B7/02
- IPC: H04B7/02 ; H04L1/02

Abstract:
In one embodiment, a circuit for matrix decomposition is provided. The circuit includes an input circuit for receiving a first matrix. A permutation circuit is coupled to the input circuit and configured to interchange columns of the first matrix according to a selected permutation to produce a second matrix. A systolic array is coupled to the permutation circuit and configured to perform QR decomposition of the second matrix to produce a third matrix and a fourth matrix. A reverse permutation circuit is coupled to the systolic array and configured to interchange rows of the third matrix according to an inverse of the selected permutation to produce a first factor matrix and interchange rows of the fourth matrix according to the inverse of the selected permutation to produce a second factor matrix.
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