Invention Grant
- Patent Title: Multi-thread processor and the multi-thread processor's interrupt processing method having interrupt processing that is processed by an associated hardware thread
- Patent Title (中): 多线程处理器和多线程处理器的中断处理方法具有由相关联的硬件线程处理的中断处理
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Application No.: US12585818Application Date: 2009-09-25
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Publication No.: US08407387B2Publication Date: 2013-03-26
- Inventor: Koji Adachi , Kazunori Miyamoto
- Applicant: Koji Adachi , Kazunori Miyamoto
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-252235 20080930
- Main IPC: G06F13/14
- IPC: G06F13/14
Abstract:
A first exemplary aspect of an embodiment of the present invention is a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, and an interrupt controller that determines whether or not an input interrupt request signal is associated with one or more than one of the plurality of hardware threads, and when the input interrupt request signal is associated, assigns the interrupt request to an associated hardware thread.
Public/Granted literature
- US20100082867A1 Multi-thread processor and its interrupt processing method Public/Granted day:2010-04-01
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