A memory card includes a bus a central processing unit (CPU) connected to the bus, a volatile memory connected to the bus, a nonvolatile memory, and a host interface. The host interface receives a first command signal from a host and outputs a reset signal for resetting the CPU, receives an update application program from the host and outputs it to the volatile memory, receives a second command signal from the host and outputs a reset release signal for releasing a reset state of the CPU, and receives an update program from the host and outputs it to the nonvolatile memory. The CPU executes the update application program stored in the volatile memory to output the update program to the nonvolatile memory in response to the reset release signal.