Invention Grant
US08409704B2 Prepreg, printed wiring board, multilayer circuit board, and process for manufacturing printed wiring board
有权
预浸料,印刷线路板,多层电路板以及印刷电路板的制造工序
- Patent Title: Prepreg, printed wiring board, multilayer circuit board, and process for manufacturing printed wiring board
- Patent Title (中): 预浸料,印刷线路板,多层电路板以及印刷电路板的制造工序
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Application No.: US12523775Application Date: 2007-01-25
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Publication No.: US08409704B2Publication Date: 2013-04-02
- Inventor: Yasuo Fukuhara , Tomoaki Watanabe , Mao Yamaguchi , Yuki Kitai , Hiroaki Fujiwara
- Applicant: Yasuo Fukuhara , Tomoaki Watanabe , Mao Yamaguchi , Yuki Kitai , Hiroaki Fujiwara
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Greenblum & Bernstein, P.L.C.
- International Application: PCT/JP2007/051166 WO 20070125
- International Announcement: WO2008/090614 WO 20080731
- Main IPC: B32B7/12
- IPC: B32B7/12

Abstract:
The invention relates to a prepreg, obtained by impregnating a base material with an epoxy resin composition containing an epoxy resin (A), a curing agent (B), an accelerator (C), a phenoxy resin (D), and an inorganic filler (E) and semi-hardening the impregnated material, wherein the inorganic filler (E) has an average particle diameter of 3 μm or less. When a circuit with a narrow wire distance is formed on a surface of a insulator substrate composed of such a prepreg by using a method of forming the circuit by plating process, an amount of the plating remaining on the insulator substrate surface at the circuit contour periphery can be reduced. As a result, it leads to stabilization of inter-circuit insulation resistance and increase in a yield during production of printed wiring boards.
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