Invention Grant
- Patent Title: Graphene devices and silicon field effect transistors in 3D hybrid integrated circuits
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Application No.: US13009280Application Date: 2011-01-19
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Publication No.: US08409957B2Publication Date: 2013-04-02
- Inventor: Josephine B. Chang , Wilfried E. Haensch , Fei Liu , Zihong Liu
- Applicant: Josephine B. Chang , Wilfried E. Haensch , Fei Liu , Zihong Liu
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A three dimensional integrated circuit includes a silicon substrate, a first source region disposed on the substrate, a first drain region disposed on the substrate, a first gate stack portion disposed on the substrate, a first dielectric layer disposed on the first source region, the first drain region, the first gate stack portion, and the substrate, a second dielectric layer formed on the first dielectric layer, a second source region disposed on the second dielectric layer, a second drain region disposed on the second dielectric layer, and a second gate stack portion disposed on the second dielectric layer, the second gate stack portion including a graphene layer.
Public/Granted literature
- US20120181508A1 Graphene Devices and Silicon Field Effect Transistors in 3D Hybrid Integrated Circuits Public/Granted day:2012-07-19
Information query
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