Invention Grant
US08409982B2 Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials 失效
通过高密度互连(HDI)衬底材料上的电介质涂层形成固体盲孔的方法

  • Patent Title: Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials
  • Patent Title (中): 通过高密度互连(HDI)衬底材料上的电介质涂层形成固体盲孔的方法
  • Application No.: US13182838
    Application Date: 2011-07-14
  • Publication No.: US08409982B2
    Publication Date: 2013-04-02
  • Inventor: Kevin C. OlsonAlan E. Wang
  • Applicant: Kevin C. OlsonAlan E. Wang
  • Applicant Address: US OH Cleveland
  • Assignee: PPG Industries Ohio, Inc.
  • Current Assignee: PPG Industries Ohio, Inc.
  • Current Assignee Address: US OH Cleveland
  • Agent Robert P. Lenart
  • Main IPC: H01L21/4763
  • IPC: H01L21/4763
Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials
Abstract:
A method includes forming a first substrate by (a) applying an electrodepositable dielectric coating onto a conductive surface; (b) curing the dielectric coating; (c) depositing an adhesion layer and a seed layer onto the dielectric coating; (d) applying a layer of a first removable material to the seed layer; (e) forming openings in the first removable material to expose areas of the seed layer; (f) electroplating a first conductive material to the exposed areas of the seed layer; (g) applying a layer of a second removable material; (h) forming openings in the second removable material to expose areas of the first conductive material; (i) plating a second conductive material to the exposed areas of the first conductive material; (j) removing the first and second removable materials; (k) removing unplated portions of the seed layer; repeating steps (a) through (k) to form a second substrate; and laminating the first and second substrates together with a layer of dielectric material between the first and second substrates to form at least one interconnect between the first and second substrates.
Information query
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02 .半导体器件或其部件的制造或处理
H01L21/04 ..至少具有一个跃变势垒或表面势垒的器件,例如PN结、耗尽层、载体集结层
H01L21/34 ...具有H01L21/06,H01L21/16及H01L21/18各组不包含的或有或无杂质,例如掺杂材料的半导体的器件
H01L21/46 ....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的(在半导体材料上制作电极的入H01L21/44)
H01L21/461 .....改变半导体材料的表面物理特性或形状的,例如腐蚀、抛光、切割
H01L21/4763 ......非绝缘层的沉积,例如绝缘层上的导电层、电阻层;这些层的后处理(电极的制造入H01L21/28)
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