Invention Grant
- Patent Title: Mounted structure
- Patent Title (中): 安装结构
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Application No.: US12260219Application Date: 2008-10-29
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Publication No.: US08410377B2Publication Date: 2013-04-02
- Inventor: Atsushi Yamaguchi , Hidenori Miyakawa , Shigeaki Sakatani , Koso Matsuno
- Applicant: Atsushi Yamaguchi , Hidenori Miyakawa , Shigeaki Sakatani , Koso Matsuno
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Steptoe & Johnson LLP
- Priority: JP2007-284976 20071101
- Main IPC: H01L23/28
- IPC: H01L23/28

Abstract:
A plurality of semiconductor elements is adjacently mounted on a substrate by a solder with a melting point of 200° C. or lower, an electronic part other than the semiconductor elements is mounted on the substrate between the adjacently mounted semiconductor elements by a solder with a melting point of 200° C. or lower, and spaces between the plurality of semiconductor elements and the substrate, spaces between the electronic part and the substrate, and spaces between the plurality of semiconductor elements and the electronic part are integrally molded with a molding resin.
Public/Granted literature
- US20090116205A1 MOUNTED STRUCTURE Public/Granted day:2009-05-07
Information query
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