Invention Grant
US08410540B2 Non-volatile memory device including a stacked structure and voltage application portion
有权
包括堆叠结构和电压施加部分的非易失性存储器件
- Patent Title: Non-volatile memory device including a stacked structure and voltage application portion
- Patent Title (中): 包括堆叠结构和电压施加部分的非易失性存储器件
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Application No.: US12886079Application Date: 2010-09-20
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Publication No.: US08410540B2Publication Date: 2013-04-02
- Inventor: Takeshi Araki , Takeshi Yamaguchi , Mariko Hayashi , Kohichi Kubo , Takayuki Tsukamoto
- Applicant: Takeshi Araki , Takeshi Yamaguchi , Mariko Hayashi , Kohichi Kubo , Takayuki Tsukamoto
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
According to one embodiment, a non-volatile memory device includes a stacked structure including a memory portion and an electrode having a surface facing the memory portion; and a voltage application portion to apply a voltage to the memory portion to change resistance. The surface includes first and second regions. The first region contains a first nonmetallic element and at least one element of a metallic element, Si, Ga, and As. The second region contains a second nonmetallic element and the at least one element. The second region has a content ratio of the second nonmetallic element higher than that in the first region. A difference in electronegativity between the second nonmetallic element and the at least one element is greater than that between the first nonmetallic element and the at least one element. At least one of the first and second regions has an anisotropic shape.
Public/Granted literature
- US20110073927A1 NON-VOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2011-03-31
Information query
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