Invention Grant
US08410573B2 SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same
有权
SOI(绝缘体上硅)结构半导体器件及其制造方法
- Patent Title: SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same
- Patent Title (中): SOI(绝缘体上硅)结构半导体器件及其制造方法
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Application No.: US12734240Application Date: 2008-10-20
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Publication No.: US08410573B2Publication Date: 2013-04-02
- Inventor: Hiroshi Ohtsuki , Mitsutaka Katada , Nobuhiko Noto , Hiroshi Takeno , Kazuhiko Yoshida
- Applicant: Hiroshi Ohtsuki , Mitsutaka Katada , Nobuhiko Noto , Hiroshi Takeno , Kazuhiko Yoshida
- Applicant Address: JP Kariya JP Tokyo
- Assignee: DENSO CORPORATION,Shin-Etsu Handotai Co., Ltd.
- Current Assignee: DENSO CORPORATION,Shin-Etsu Handotai Co., Ltd.
- Current Assignee Address: JP Kariya JP Tokyo
- Agency: Posz Law Group, PLC
- Priority: JP2007-273813 20071022; JP2008-261781 20081008
- International Application: PCT/JP2008/002964 WO 20081020
- International Announcement: WO2009/054115 WO 20090430
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
In a SOI structure semiconductor device using a SOI substrate, a lattice distortion layer is formed by implanting Ar ions into a silicon substrate as an active layer. The lattice distortion layer is capable of serving as a gettering site. The dose amount of Ar ions is adjusted in such a manner that tensile stress in the lattice distortion layer is equal to or greater than 11 MPa and equal to or less than 27 MPa. Thus, the lattice distortion layer can prevent occurrence of a leakage current while serving as the gettering site.
Public/Granted literature
- US20100264510A1 SOI (SILICON ON INSULATOR) STRUCTURE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-10-21
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