Invention Grant
US08410582B2 3D polysilicon diode with low contact resistance and method for forming same
有权
具有低接触电阻的3D多晶硅二极管及其形成方法
- Patent Title: 3D polysilicon diode with low contact resistance and method for forming same
- Patent Title (中): 具有低接触电阻的3D多晶硅二极管及其形成方法
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Application No.: US13479093Application Date: 2012-05-23
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Publication No.: US08410582B2Publication Date: 2013-04-02
- Inventor: Abhijit Bandyopadhyay , Kun Hou , Steven Maxwell
- Applicant: Abhijit Bandyopadhyay , Kun Hou , Steven Maxwell
- Applicant Address: US CA Milpitas
- Assignee: SanDisk 3D LLC
- Current Assignee: SanDisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A semiconductor p-i-n diode and method for forming the same are described herein. In one aspect, a SiGe region is formed between a region doped to have one conductivity (either p+ or n+) and an electrical contact to the p-i-n diode. The SiGe region may serve to lower the contact resistance, which may increase the forward bias current. The doped region extends below the SiGe region such that it is between the SiGe region and an intrinsic region of the diode. The p-i-n diode may be formed from silicon. The doped region below the SiGe region may serve to keep the reverse bias current from increasing as result of the added SiGe region. In one embodiment, the SiGe is formed such that the forward bias current of an up-pointing p-i-n diode in a memory array substantially matches the forward bias current of a down-pointing p-i-n diode which may achieve better switching results when these diodes are used with the R/W material in a 3D memory array.
Public/Granted literature
- US20120228579A1 3D POLYSILICON DIODE WITH LOW CONTACT RESISTANCE AND METHOD FOR FORMING SAME Public/Granted day:2012-09-13
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