Invention Grant
US08410590B2 Device including a power semiconductor chip electrically coupled to a leadframe via a metallic layer
有权
包括通过金属层电耦合到引线框的功率半导体芯片的装置
- Patent Title: Device including a power semiconductor chip electrically coupled to a leadframe via a metallic layer
- Patent Title (中): 包括通过金属层电耦合到引线框的功率半导体芯片的装置
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Application No.: US12241769Application Date: 2008-09-30
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Publication No.: US08410590B2Publication Date: 2013-04-02
- Inventor: Ralf Otremba
- Applicant: Ralf Otremba
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: H01L23/495
- IPC: H01L23/495
Abstract:
A device including a power semiconductor chip. One embodiment provides a power semiconductor chip having a first electrode on a first surface and a second and a third electrode on a second surface opposite to the first surface. A leadframe includes a carrier and a first lead, the power semiconductor chip placed over the carrier with the first surface of the power semiconductor chip facing the carrier. A metallic layer includes a first surface and a second surface opposite to the first surface. The metallic layer is placed over the second surface of the power semiconductor chip with the first surface of the metallic layer facing the power semiconductor chip. The second surface of the metallic layer and a surface of the first lead lie within a common mounting plane.
Public/Granted literature
- US20100078784A1 DEVICE INCLUDING A POWER SEMICONDUCTOR CHIP Public/Granted day:2010-04-01
Information query
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