Invention Grant
US08410596B2 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package
有权
半导体多封装模块包括带状基板焊盘阵列封装堆叠在球栅阵列封装上
- Patent Title: Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package
- Patent Title (中): 半导体多封装模块包括带状基板焊盘阵列封装堆叠在球栅阵列封装上
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Application No.: US12059077Application Date: 2008-03-31
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Publication No.: US08410596B2Publication Date: 2013-04-02
- Inventor: Marcos Karnezos
- Applicant: Marcos Karnezos
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A single metal layer tape substrate includes a patterned metal layer affixed to a patterned dielectric layer. The dielectric layer is patterned to provide openings exposing lands and bond sites on bond fingers on the land side of the metal layer. The metal layer is patterned to provide circuit traces as appropriate for interconnection with the die and with other elements. Interconnection with a die is made by wire bonding to exposed traces on a die attach side of the metal layer, and bond fingers and lands for access to testing the package are provided on the land side of the metal layer.
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Information query
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