A bias circuit generates a bias voltage. The bias circuit includes a first, a second, and a third detection circuit and a summing circuit. The first detection circuit generates a first characterization voltage that represents a variation of a power supply voltage from a nominal voltage. The first characterization voltage increases as the power supply voltage decreases and the first characterization voltage decreases as the power supply voltage increases. The second detection circuit generates a second characterization voltage that represents a threshold voltage of one or more p-type transistors. The third detection circuit generates a third characterization voltage that represents a threshold voltage of one or more n-type transistors. The summing circuit generates the bias voltage that is the power supply voltage reduced by a weighted sum of the first, second, and third characterization voltages.