Invention Grant
- Patent Title: Low-voltage high-speed frequency divider with reduced power consumption
- Patent Title (中): 低电压高速分频器，功耗降低
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Application No.: US13186614Application Date: 2011-07-20
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Publication No.: US08410831B2Publication Date: 2013-04-02
- Inventor: Tonmoy Shankar Mukherjee
- Applicant: Tonmoy Shankar Mukherjee
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Eugene C. Conser; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03K21/00
- IPC: H03K21/00 ; H03B19/06
Abstract:
A low-voltage high-speed frequency divider substantially reduces the power required to generate a half-rate in-phase clock signal and a half-rate quadrature-phase clock signal by reducing the number of pairs of transistors that respond to a full-rate clock signal and a full-rate inverse clock signal.
Public/Granted literature
- US20130021068A1 Low-Voltage High-Speed Frequency Divider with Reduced Power Consumption Public/Granted day:2013-01-24
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