Invention Grant
US08410853B2 Inductive circuit arrangement 有权
感应电路布置

  • Patent Title: Inductive circuit arrangement
  • Patent Title (中): 感应电路布置
  • Application No.: US12791589
    Application Date: 2010-06-01
  • Publication No.: US08410853B2
    Publication Date: 2013-04-02
  • Inventor: Igor Blednov
  • Applicant: Igor Blednov
  • Applicant Address: NL Eindhoven
  • Assignee: NXP B.V.
  • Current Assignee: NXP B.V.
  • Current Assignee Address: NL Eindhoven
  • Main IPC: H03F3/68
  • IPC: H03F3/68
Inductive circuit arrangement
Abstract:
A bond wire circuit includes at least three bond wires arranged to split an input signal into two output signals. In connection with various example embodiments, bond wires are arranged in a generally parallel manner to mitigate magnetic coupling and related issues for splitting an input signal and providing each of split signals to an amplifier. The bond wires are connected by capacitive circuits that facilitate the splitting, and in some applications, additional capacitive (to ground/reference) and load circuits to further facilitate the splitting of the input signals for specific amplifier circuit implementations, and applications to various loads. In some implementations, the input signals are split in equal or arbitrary portions with frequency independent phase differences in a wide frequency band, with isolation between ports of the circuit.
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