Invention Grant
- Patent Title: Black level correction circuit and solid-state imaging device
- Patent Title (中): 黑电平校正电路和固态成像装置
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Application No.: US12659784Application Date: 2010-03-22
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Publication No.: US08411173B2Publication Date: 2013-04-02
- Inventor: Hiroyuki Horikawa , Hiroki Ui
- Applicant: Hiroyuki Horikawa , Hiroki Ui
- Applicant Address: JP Tokyo
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Tokyo
- Agency: Rader, Fishman & Grauer PLLC
- Priority: JP2009-107138 20090424
- Main IPC: H04N9/64
- IPC: H04N9/64

Abstract:
A black level correction circuit includes: a counter counting a black signal level of an image; a black level determination section determining a feedback gain by comparing data outputted from the counter with a previously set threshold; an average value calculation section calculating an average value from data supplied from the counter; a feedback calculation processing section selecting the feedback gain by a control signal supplied from the black level determination section and calculating the selected feedback gain and the averaged data; and a digital-analog converter correcting data to which feedback calculation processing has been performed and converting the corrected data into analog data to output an analog black signal.
Public/Granted literature
- US20100271514A1 Black level correction circuit and solid-state imaging device Public/Granted day:2010-10-28
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