A pixel array in an image sensor includes multiple pixels arranged in rows and columns with each column of pixels electrically connected to a column output line. A sample and hold circuit is electrically connected to each column output line. In one embodiment in accordance with the invention, each sample and hold circuit includes one capacitor for receiving and storing a signal voltage and a second capacitor for receiving and storing a reset voltage. The sample and hold circuits are divided into distinct groups, with each group including two or more sample and hold circuits. A pair of buffers is electrically connected to each distinct group. One global bus receives the signal voltages from at least a portion of buffers and another global bus receives the reset voltages from at least a portion of the other buffers. The global buses can include one or more signal lines.